1. Field of the Invention
The invention relates to a display apparatus and a display method for a display panel. The display apparatus and the display method can reduce the amount of gate control signals.
2. Description of Related Art
Along with the high resolution development tendency of a TFT-LCD, more scan lines are required to be disposed on a display panel. Meanwhile, more gate driving ICs are needed to provide gate control signals, which result in an increasing design cost of the driving ICs.
In the prior art, since the gate control signals and the scan lines are configured in one-to-one manner, the gate driving circuit needs to provide a same number of gate control signals for driving the scan lines correspondingly. Thus, the fan out area served for connecting the gate terminals and the scan lines (or termed as gate lines) in the panel would become more tight and congested with an increasing number of scan lines, which would increase parasitic capacitance and parasitic impedance. On the other hand, in order to meet the design requirement of light, thin and small, the space within a panel assigned to dispose the fan out area is further shrunk. However, to reduce the influence of parasitic capacitance and parasitic impedance, a sufficient space for wiring of signal and the layout thereof is needed; more tight the layout of a circuit is, the more sensitive the circuit is to the generated parasitic capacitance to affect the display quality.
The US patent publication No. US2006/0022202 provides a scheme to reduce the number of gate control signals by half by using a control circuit, but it requires an additional control circuit to perform the switching of driving signals, which results in an increasing design cost.